International Conference on Artificial Intelligence and Cybersecurity

B. Khaleelu Rehman

Biography

Dr. B. Khaleelu Rehman presently working as an Associate professor in the Department of ECE, Chaitanya Bharathi Institute of Technology (Autonomous), Hyderabad, India. He received a Ph.D. degree from the University of Petroleum & Energy Studies, Dehradun, and an M. Tech from Jawaharlal Nehru Technological University, Hyderabad in VLSI System Design. He has 17 years of teaching experience out of which 9 years at the University of Petroleum & Energy Studies, Dehradun. He has published research articles across the globe. 4 SCI journal papers, 33 Scopus journal papers, and 20 International conference papers, and authored five book chapters in world-renowned publishers apart from possessing an Indian patent. He is a reviewer and editorial member for several reputed journals and also an active member of several professional societies. He has conducted 15 workshops in the UPES and attended 21 workshops/short-term courses/FDPs. He has been awarded a Certificate of Appreciation from R&D Department, UPES during the Academic year 2017-2018 and 2016-2017. He was the session chair for the International Conference on Intelligent Communication, Control and Devices at Dehradun, India (Springer Conference) viz. ICICCD-2016, ICICCD-2017 and ICICCD-2018. He was invited to give guest lectures at various places in India on innovative topics. He is a senior member of the IEEE Circuits and Systems Society. His area of interest includes Digital Signal Processing, VLSI Design, Digital VLSI Architectures, and Analog Circuits. 

Research Interest

IP Core-Based Design in FPGA

Abstract

IP cores (Intellectual Property cores) are pre-verified functional blocks that enable FPGA designers to rapidly integrate complex functionalities into their systems without building everything from scratch. Modern FPGA development leverages IP cores for implementing memory controllers, DSP blocks, communication protocols, and even entire embedded processors. This talk explores the fundamentals of IP cores, their categories, advantages, and the process of integrating them into FPGA designs using tools like Xilinx Vivado and Intel Quartus. Real-world applications and design case studies will be discussed to demonstrate how IP cores significantly reduce design time and complexity, ensuring optimal performance and reliability.